Chips and Cheese
AMD’s EPYC 7J13: Zen 3 Customized
#ChipAndCheese
Telegraph | source
(author: clamchowder)
AMD’s EPYC 7J13: Zen 3 Customized
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
AMD’s Zen 4, Part 3: System Level Stuff, and iGPU
#ChipAndCheese
Telegraph | source
(author: clamchowder)
AMD’s Zen 4, Part 3: System Level Stuff, and iGPU
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Previewing China’s Loongson 3A5000 with Performance Counters
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Previewing China’s Loongson 3A5000 with Performance Counters
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Golden Cove’s Lopsided Vector Register File
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Golden Cove’s Lopsided Vector Register File
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Was Rocket Lake Power Efficient?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Was Rocket Lake Power Efficient?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Addendum: Clock Ramp on ADL, Zen 4, M1, and More
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Addendum: Clock Ramp on ADL, Zen 4, M1, and More
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Nvidia’s RTX 4090 Launch: A Strong Ray-Tracing Focus
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Nvidia’s RTX 4090 Launch: A Strong Ray-Tracing Focus
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Caching Energy Efficiency Data – Mobile and AVX-512
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Caching Energy Efficiency Data – Mobile and AVX-512
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
How Quickly do CPUs Change Clock Speeds?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
How Quickly do CPUs Change Clock Speeds?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Alder Lake’s Caching and Power Efficiency
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Alder Lake’s Caching and Power Efficiency
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Intel Renames Oregon Fab: Gordon Moore Park. Adds +270k sq ft, 18A Node now 2024
#ChipAndCheese
Telegraph | source
(author: iancutress)
Intel Renames Oregon Fab: Gordon Moore Park. Adds +270k sq ft, 18A Node now 2024
#ChipAndCheese
Telegraph | source
(author: iancutress)
Chips and Cheese
SiFive Completes Series F Funding Round: +$175m, $2.5b Evaluation
#ChipAndCheese
Telegraph | source
(author: iancutress)
SiFive Completes Series F Funding Round: +$175m, $2.5b Evaluation
#ChipAndCheese
Telegraph | source
(author: iancutress)
Chips and Cheese
Centaur CHA’s Probably Unfinished Dual Socket Implementation
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Centaur CHA’s Probably Unfinished Dual Socket Implementation
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
GPU Hardware Video Encoders – How Good Are They?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
GPU Hardware Video Encoders – How Good Are They?
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Alder Lake’s Power Efficiency – A Complicated Picture
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Alder Lake’s Power Efficiency – A Complicated Picture
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Alder Lake – E-Cores, Ring Clock, and Hybrid Teething Troubles
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Alder Lake – E-Cores, Ring Clock, and Hybrid Teething Troubles
#ChipAndCheese
Telegraph | source
(author: clamchowder)
Chips and Cheese
Nvidia’s Ampere & Process Technology: Sunk by Samsung?
#ChipAndCheese
Telegraph | source
(author: Jeremy Tingle)
Nvidia’s Ampere & Process Technology: Sunk by Samsung?
#ChipAndCheese
Telegraph | source
(author: Jeremy Tingle)