GPUs started out as devices meant purely for graphics rendering, but their highly parallel nature made them attractive for certain compute tasks too. As the GPU compute scene grew over the past couple decades, Nvidia made massive investments to capture the…

Note the publish day of this article. There will be a proper one on Terascale 3 later on, don’t worry. But for now, happy April Fools Day! Prestige is everything for computer hardware manufacturers. A few percentage points may not make or break someone’s…

In a previous article, we compared Infinity Cache latency between the RX 7900 XTX, and the smaller RX 7600. After further testing, some correction is in order. AMD’s RDNA 3 architecture uses aggressive power saving techniques. Part of this seems to involve…

Loongson used to make CPUs based off the MIPS ISA, but the company recently switched to a homegrown ISA called Loongarch. This “new” ISA retains many of MIPS’s semantics, but uses incompatible encodings. Loongarch also gets extended to better support Loongson’s…

Editor’s Note (6/14/2023): We have a new article that reevaluates the cache latency of Navi 31, so please refer to that article for some new latency data. Late last year, AMD launched high end RDNA 3 with the Radeon RX 7900 XTX and Radeon RX 7900 XT. Now…

Recently, curiosity drove me to do some microbenchmarking on Lambda Cloud’s A100 instance. That A100 instance is powered by a “AMD EPYC 7J13 64-Core Processor”. AMD’s site does not mention this SKU, nor is it listed on Wikipedia’s Epyc page. lscpu claims…

We covered Zen 4’s core architecture in depth in two articles. This one will focus on anything we didn’t manage to get to. Some of these details may be specific to the particular CPU sample we have, and many of them won’t have a significant effect on application…

Loongson’s 3A5000 represents another domestic CPU effort from China. It implements four LA464 cores, and targets everything from desktops to servers to embedded applications. Like the Zhaoxin KX-6640MA and Phytium D2000 that we covered previously, Loongson’s…

Ever since Intel first brought AVX-512 to their big core lineup, they made all of the vector registers 512-bit. They extended the vector register file on the opposite side of the execution units, and used that extension to store the upper 256 bits of a 512…

Compared to Golden Cove? Of course not. A newer architecture on a newer process should have a pretty huge advantage. Unsurprisingly, Golden Cove is faster at any power level. So let’s go for more appropriate comparisons. If we level the playing field a bit…

We recently released an article on how quickly CPUs increased their clocks from idle, and received criticism in that it didn’t include CPUs newer than Kaby Lake. That was because I just didn’t have access to such systems, but since that article, we’ve gotten…

Recently, Nvidia announced their RTX 4000 series at GTC 2022. At a high level, Nvidia took advantage of a process node shrink to evolve their architecture while also scaling it up and clocking it much higher. The top end AD102 die found in the 4090 packs…

A few days ago, we looked at the power costs associated with moving data on some desktop parts. This is a short follow up with some data from Zen 3 and Willow Cove in mobile configurations, as well as Cascade Lake-X. That lets us dig into how power costs…

We often see very high clock frequencies listed for our CPUs. But CPUs don’t run at maximum clock all the time in order to reduce power consumption and heat generation. They also can’t instantly go from one clock speed to another, because power delivery circuitry…

Processor caches are known to improve performance, but they also significantly influence power efficiency. Modern CPUs spend a lot of power to move data around. If data can be pulled from sources closer to the core, the CPU can spend less power moving data.…

If there’s one thing that’s cheaper than building a new fab, it’s expanding an existing one. Intel’s Oregon D1 facility has been the hub of all of its technology advancements over the past 20 years, whereby Intel will trial new manufacturing processes before…

The three main architectures currently in the ecosystem that people talk about are x86, Arm, and RISC-V. It’s that last one we’re focusing on, as the newest on the block and it is slowly becoming a de-facto option for a lot of simple compute designs as well…

Centaur’s CHA chip targets the server market with a low core count. Its dual socket capability is therefore quite important, because it’d allow up to 16 cores in a single CHA-based server. Unfortunately for Centaur, modern dual socket implementations are…

Figuring out the best way to encode a video is very computationally expensive, and it might not a good idea to throw a ton of CPU cycles at encoding video when you’re running a game. That’s why modern GPUs usually include hardware video encoders. Here, we’ll…

Reviews across the internet show Alder Lake getting very competitive performance with very high power consumption. For example, Anandtech measured 272 W of package power during a POV-Ray run. Our own testing showed eight Golden Cove cores alone could pull…